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Four-Terminal-Relay Body-Biasing Schemes for Complementary Logic Circuits
Friday, July 30, 2010 - 04:21 AM - 1 month, 1 week ago - Electrical Engineering - Electron Device Letters - IEEE
Four-terminal-relay inverter circuit characteristics are investigated. To achieve maximum noise margin and zero crowbar current while allowing for relay-to-relay variations, the optimal biasing scheme provides for switching that is symmetric about $V_{rm DD}/hbox{2}$ with minimum hysteresis and no possibility of both the pull-down and pull-up devices being on simultaneously.
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